MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 174

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
8
8.3.2.5
This 8-bit register contains the value that will be loaded into the timer C down-counter at the next
underflow. At reset, timer C is stopped and state of the modulus register is indeterminate.
8.3.2.6
8-bit modulus timer C control (T8CCR) $005F
T8CI8 — bit timer C interrupt enable
When set, an 8-bit modulus timer interrupt occurs when the timer reaches $00. At this time the
timer counter is loaded with the value stored in T8CDR and the 8-bit counter will continue to count
down at the selected clock rate.
T8CF — 8-bit timer C underflow flag
Set when 8-bit modulus timer C reaches $00. An interrupt is generated if enabled by T8CI. This
bit is cleared by a write to the T8CCR register with T8CF set.
Bits [5, 4] — Not implemented; always read zero
PRC — 8-bit timer C preset
A write to the T8CCR register with this bit set will preset the timer C counter to the modulus register
value. The clock must be stopped before writing to the register. This bit always reads as 0.
CSC[2:0] — 8-bit timer C clock rate
These bits select the timer C clock, as shown in Table 8-6. At reset, timer C is not clocked.
MOTOROLA
8-40
8-bit modulus timer C data (T8CDR)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
T8CDR — 8-bit modulus timer C data register
T8CCR — 8-bit modulus timer C control register
Hardware interrupt requested when T8CF flag set.
Interrupt disabled.
Underflow has occurred.
No underflow has occurred.
Address
Address
$005B
(bit 7)
T8CI
bit 7
bit 7
TIMING SYSTEM
T8CF
bit 6
bit 6
(6)
bit 5
bit 5
(5)
0
bit 4
bit 4
(4)
0
PRC
bit 3
bit 3
(3)
CSC2 CSC1 CSC0 0000 0000
bit 2
bit 2
(2)
bit 1
bit 1
(1)
MC68HC11PH8
bit 0
bit 0
(0)
undeÞned
on reset
on reset
State
State
TPG

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