MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 150

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

8
8.1.4.8
Bits in this register indicate when timer system events have occurred. Coupled with the bits of
TMSK1, the bits of TFLG1 allow the timer subsystem to operate in either a polled or interrupt
driven system. Clear flags by writing a one to the corresponding bit position(s).
Note:
OC1F–OC4F — Output compare x flag
These flags are set each time the counter matches the corresponding output compare x values.
I4/O5F — Input capture 4/output compare 5 flag
Set by IC4 or OC5, depending on the function enabled by I4/O5 bit in PACTL
IC1F–IC3F — Input capture x flag
These flags are set each time a selected active edge is detected on the ICx input line
MOTOROLA
8-16
Timer interrupt ßag 1 (TFLG1)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
Bits in TFLG1 correspond bit for bit with flag bits in TMSK1. Ones in TMSK1 enable the
corresponding interrupt sources.
TFLG1 — Timer interrupt flag register 1
–
–
Counter has reached the preset output compare x value.
Counter has not reached the preset output compare x value.
Selected edge has been detected on corresponding port pin.
Selected edge has not been detected on corresponding port pin.
Address
$0023
OC1F OC2F OC3F OC4F I4/O5F IC1F
bit 7
TIMING SYSTEM
bit 6
bit 5
bit 4
bit 3
bit 2
IC2F
bit 1
MC68HC11PH8
IC3F
bit 0
0000 0000
on reset
State
TPG