MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 137
MC68HC711PH8
Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
1.MC68HC711PH8.pdf
(264 pages)
- Current page: 137 of 264
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8.1.1
The 16-bit timer may be enabled or disabled under control of the T16EN bit in the PLL control
register.
8.1.1.1
PLLON — PLL on (See Section 2.5.4.1)
BCS — Bus clock select (See Section 2.5.4.1)
AUTO — Automatic bandwidth control (See Section 2.5.4.1)
BWC — Bandwidth control (See Section 2.5.4.1)
VCOT — VCO test (Test mode only, see Section 2.5.4.1)
MCS — Module clock select (See Section 2.5.4.1)
MC68HC11PH8
PLL control (PLLCR)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
Timer enable control
PLLCR — PLL control register
–
–
–
–
–
–
Switch PLL on.
Switch PLL off.
VCOOUT output drives the clock circuit (4XCLK).
EXTALi drives the clock circuit (4XCLK).
Automatic bandwidth control selected.
Manual bandwidth control selected.
High bandwidth control selected.
Low bandwidth control selected.
Loop filter operates as specified by AUTO and BWC.
Low bandwidth mode of the PLL filter is disabled.
4XCLK is the source for the SCI and timer divider chain.
EXTALi is the source for the SCI and timer divider chain.
Address
$002E PLLON BCS
bit 7
TIMING SYSTEM
bit 6
AUTO
bit 5
BWC
bit 4
VCOT
bit 3
MCS T16EN WEN 1010 1010
bit 2
bit 1
bit 0
MOTOROLA
on reset
State
TPG
8-3
8
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