MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 57

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

PH8.DS03/Modes+mem
Refer to Table 3-4, which is a summary of mode pin operation, the mode control bits and the four
operating modes.
A normal mode is selected when MODB is logic one during reset. One of three reset vectors is
fetched from address $FFFA–$FFFF, and program execution begins from the address indicated
by this vector. If MODB is logic zero during reset, the special mode reset vector is fetched from
addresses $BFFA–$BFFF and software has access to special test features. Refer to Section 10.
3.3.1.1
Note:
RBOOT — Read bootstrap ROM
SMOD — Special mode select
Once cleared, cannot be set again.
MDA — Mode select A
PSEL[4:0] — Priority select bits (refer to Section 10)
MC68HC11PH8
Highest priority interrupt (HPRIO)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
RBOOT, SMOD and MDA bits depend on the power-up initialization mode and can only
be written in special modes when SMOD = 1. Refer to Table 3-4.
HPRIO — Highest priority I-bit interrupt & misc. register
–
–
–
MODB
1
1
0
0
Bootloader ROM enabled, at $BE40–$BFFF.
Bootloader ROM disabled and not in map.
Special mode variation in effect.
Normal mode variation in effect.
Normal expanded or special test mode. (Expanded buses active.)
Normal single chip or special bootstrap mode. (Ports active.)
Inputs
OPERATING MODES AND ON-CHIP MEMORY
Table 3-4 Hardware mode select summary
MODA
0
1
0
1
Address
—this line does not form part of the document—
$003C RBOOT SMOD
Single chip
Expanded
Special bootstrap
Special test
bit 7
Mode
bit 6
Control bits in HPRIO (latched at reset)
RBOOT
MDA PSEL4 PSEL3 PSEL2 PSEL1 PSEL0 xxx0 0110
bit 5
0
0
1
0
bit 4
SMOD
0
0
1
1
bit 3
bit 2
MDA
[DS97 v 4.1] 08/Apr/97@13:55
0
1
0
1
bit 1
bit 0
MOTOROLA
on reset
State
TPG
3-11
10
12
13
14
15
11
1
2
3
4
5
6
7
8
9