MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 133

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
7.6.1
For details of the functions of bits 2,3,4,6 and 7, see Section 7.5.1.
GWOM — Port G wired-OR mode
SP2R1 and SP2R0 — SPI2 clock rate selects
These two bits, along with the SP2R2 bit, select the SPI clock rate as shown in Table 7-1. Note
that SP2R2 is located in the SP2OPT register, and that its state on reset is zero.
7.6.2
For a description of bits 4,6 and 7, see Section 7.5.2.
7.6.3
For a description of this register, see Section 7.5.3.
7.6.4
For a description of bits 2 and 3, see Section 7.5.4.
MC68HC11PH8
SPI2 control options (SP2DR)
SPI2 control (SP2CR)
SPI2 status (SP2SR)
SPI2 data (SP2DR)
1 (set)
0 (clear) –
SP2CR — SPI2 control register
SP2SR — SPI2 status register
SP2DR — SPI2 data register
SP2OPT — SPI2 control options register
Port G [5:2] buffers configured for open-drain outputs.
Port G [5:2] buffers configured for normal CMOS outputs.
Address
Address
Address
Address
$004C
$004D
$004E
$004F
SERIAL PERIPHERAL INTERFACE
SP2IE SP2E GWOM MSTR2 CPOL2 CPHA2 SP2R1 SP2R0 0000 01uu
SP2IF WCOL2
(bit 7)
bit 7
bit 7
bit 7
bit 7
0
bit 6
bit 6
Bit 6
bit 6
(6)
0
bit 5
bit 5
bit 5
bit 5
(5)
0
0
MODF2
bit 4
bit 4
bit 4
bit 4
(4)
0
LSBF2 SP2R2
bit 3
bit 3
bit 3
bit 3
(3)
0
bit 2
bit 2
bit 2
bit 2
(2)
0
bit 1
bit 1
bit 1
bit 1
(1)
0
0
(bit 0) undeÞned
bit 0
bit 0
bit 0
bit 0
0
0
MOTOROLA
0000 0000
0000 0000
on reset
on reset
on reset
on reset
State
State
State
State
TPG
7-11
7

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