MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 184

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

9
9.4.2
These read-only registers hold an 8-bit conversion result. Writes to these registers have no effect.
Data in the A/D converter result registers is valid when the CCF flag in the ADCTL register is set,
indicating a conversion sequence is complete. If conversion results are needed sooner, refer to
Figure 9-3, which shows the A/D conversion sequence diagram.
9.5
If a conversion sequence is in progress when either the STOP or WAIT mode is entered, the
conversion of the current channel is suspended. When the MCU resumes normal operation, that
channel is resampled and the conversion sequence is resumed. As the MCU exits the WAIT mode,
the A/D circuits are stable and valid results can be obtained on the first conversion. However, in
STOP mode, all analog bias currents are disabled and it is necessary to allow a stabilization period
when leaving the STOP mode. If the STOP mode is exited with a delay (DLY = 1), there is enough
time for these circuits to stabilize before the first conversion. If the STOP mode is exited with no
delay (DLY bit in OPTION register = 0), allow 10 ms for the A/D circuitry to stabilize to avoid invalid
results.
MOTOROLA
9-10
A/D result 1 (ADR1)
A/D result 2 (ADR2)
A/D result 3 (ADR3)
A/D result 4 (ADR4)
ADR1–ADR4 — A/D converter results registers
Operation in STOP and WAIT modes
Address
ANALOG-TO-DIGITAL CONVERTER
$0031
$0032
$0033
$0034
(1) Used for factory testing.
(bit 7)
(bit 7)
(bit 7)
(bit 7)
bit 7
bit 6
(6)
(6)
(6)
(6)
bit 5
(5)
(5)
(5)
(5)
bit 4
(4)
(4)
(4)
(4)
bit 3
(3)
(3)
(3)
(3)
bit 2
(2)
(2)
(2)
(2)
bit 1
(1)
(1)
(1)
(1)
MC68HC11PH8
(bit 0) undeÞned
(bit 0) undeÞned
(bit 0) undeÞned
(bit 0) undeÞned
bit 0
on reset
State
TPG