MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 178

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

9
9.1.4
Four 8-bit registers (ADR1 – ADR4) store conversion results. Each of these registers can be
accessed by the processor in the CPU. The conversion complete flag (CCF) indicates when valid
data is present in the result registers. The result registers are written during a portion of the system
clock cycle when reads do not occur, so there is no conflict.
9.1.5
The CSEL bit in the OPTION register selects whether the A/D converter uses the system E clock
or an internal RC oscillator for synchronization. When E clock frequency is below 750kHz, charge
leakage in the capacitor array can cause errors, and the internal oscillator should be used. When
the RC clock is used, additional errors can occur because the comparator is sensitive to the
additional system clock noise.
9.1.6
A/D converter operations are performed in sequences of four conversions each. A conversion
sequence can repeat continuously or stop after one iteration. The conversion complete flag (CCF)
is set after the fourth conversion in a sequence to show the availability of data in the result
registers. Figure 9-3 shows the timing of a typical sequence. Synchronization is referenced to the
system E clock.
MOTOROLA
9-4
E clock
Result registers
A/D converter clocks
Conversion sequence
0
update ADR1
channel and
Convert Þrst
Sample analog input
12 cycles
Figure 9-3 A/D conversion sequence
ANALOG-TO-DIGITAL CONVERTER
32
Convert second
update ADR2
channel and
4 cycles
MSB
Successive approximation sequence
64
2 cyc 2 cyc 2 cyc 2 cyc 2 cyc 2 cyc 2 cyc 2 cyc
bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
update ADR3
Convert third
channel and
96
Convert fourth
update ADR4
channel and
END
128 E clock cycles
MC68HC11PH8
TPG