UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1005

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
V850ES/JG3-H, V850ES/JH3-H
20.13.3 Self-test mode
CAN node to the CAN bus or without affecting the CAN bus.
are internally looped back. The CAN transmission pin (CTXD0) is fixed to the recessive level.
mode from the self-test mode, however, the module is released from the CAN sleep mode in the same manner as the
other operation modes (when the sleep mode is released while the CAN clock is supplied, however, the PSMODE0 bit
must be cleared by software after a falling edge is detected at the CAN reception pin (CRXD0).). To keep the module in
the CAN sleep mode, use the CAN reception pin (CRXD0) as a port pin.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
In the self-test mode, message frame transmission and message frame reception can be tested without connecting the
In the self-test mode, the CAN module is completely disconnected from the CAN bus, but transmission and reception
If the falling edge on the CAN reception pin (CRXD0) is detected after the CAN module has entered the CAN sleep
Figure 20-34. CAN Module Terminal Connection in Self-Test Mode
Fixed to the
recessive level
CTXD0
Tx
CAN macro
Rx
CRXD0
CHAPTER 20 CAN CONTROLLER
Page 1005 of 1509

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