UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 549

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Figure 9-51. Operation Example (Count Operation in Range from 0000H to Set Value of TT0CCR0 Register)
<3> TT0LDE bit: Transfer function of the set value of the TT0CCR0 register to the 16-bit counter when the
counter underflows
When the TT0LDE bit = 1, the set value of the TT0CCR0 register can be transferred to the 16-bit counter
when the counter underflows.
The TT0LDE bit is valid only in the encoder compare mode.
• Count operation in range from 0000H to set value of the TT0CCR0 register
Set value of TT0CCR0 register (N)
If the 16-bit counter performs a count operation when the TT0LDE bit = 1 and TT0ECM1 and TT0ECM0
bits = 01, and when the count value of the counter matches the set value of the CCR0 buffer register
when the TT0ECM0 bit = 1, the 16-bit counter is cleared to 0000H if the next count operation is
counting up.
If the 16-bit counter underflows when the TT0LDE bit = 1, the set value of the TT0CCR0 register is
transferred to the counter.
Therefore, the counter can operate in a range from 0000H to the set value of the TT0CCR0 register in
which the upper-limit count value is the set value of the TT0CCR0 register and the lower-limit value is
0000H.
matches value of CCR0 buffer register.
Count value of 16-bit counter
16-bit counter
0000H
cleared to 0000H.
16-bit counter is
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
Count up
16-bit counter
underflows.
Count down
Set value of TT0CCR0 register
is transferred to 16-bit counter.
Page 549 of 1509

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