UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 949

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
CAN0 module mask 3 register (C0MASK3L, C0MASK3H)
CAN0 module mask 4 register (C0MASK4L, C0MASK4H)
Caution Be sure to set bits 13 to 15 of the C0MASKaH register to 0.
Remark Masking is always defined by an ID length of 29 bits. If a mask is assigned to a message with a
After reset: Undefined
C0MASK3L
C0MASK3H
After reset: Undefined
C0MASK4L
C0MASK4H
CMID28 to CMID0
0
1
standard ID, the CMID17 to CMID0 bits are ignored. Therefore, only the CMID28 to CMID18 bits of
the received ID are masked. The same mask can be used for both the standard and extended IDs.
CMID15
CMID23
CMID15
CMID23
CMID7
CMID7
15
15
15
15
7
0
7
7
0
7
The ID bits of the message buffer set by the CMID28 to CMID0 bits are compared with the ID
bits of the received message frame.
The ID bits of the message buffer set by the CMID28 to CMID0 bits are not compared with the
ID bits of the received message frame (they are masked).
R/W
R/W
CMID14
CMID22
CMID14
CMID22
CMID6
CMID6
14
14
14
14
6
0
6
6
0
6
Address: C0MASK3L 03FEC048H, C0MASK3H 03FEC04AH
Address: C0MASK4L 03FEC04CH, C0MASK4H 03FEC04EH
CMID13
CMID21
CMID13
CMID21
CMID5
CMID5
13
13
13
13
0
0
5
5
5
5
Mask pattern setting of ID bit
CMID12
CMID28
CMID20
CMID12
CMID28
CMID20
CMID4
CMID4
12
12
12
12
4
4
4
4
CMID11
CMID27
CMID19
CMID11
CMID27
CMID19
CMID3
CMID3
11
11
11
11
3
3
3
3
CHAPTER 20 CAN CONTROLLER
CMID10
CMID26
CMID18
CMID10
CMID26
CMID18
CMID2
CMID2
10
10
10
10
2
2
2
2
CMID25
CMID17
CMID25
CMID17
CMID9
CMID1
CMID9
CMID1
9
1
9
1
9
1
9
1
Page 949 of 1509
CMID24
CMID16
CMID24
CMID16
CMID8
CMID0
CMID8
CMID0
8
0
8
0
8
0
8
0
(2/2)

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