UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 230

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(a) Function as compare register
(b) Function as capture register
The following table shows the functions of the capture/compare register in each mode, and how to write data to the
compare register.
Table 7-4. Function of Capture/Compare Register in Each Mode and How to Write Compare Register
Interval timer
External event counter
External trigger pulse output
One-shot pulse output
PWM output
Free-running timer
Pulse width measurement
The TAAnCCR1 register can be rewritten even when the TAAnCTL0.TAAnCE bit = 1.
The set value of the TAAnCCR1 register is transferred to the CCR1 buffer register. When the value of the 16-
bit counter matches the value of the CCR1 buffer register, a compare match interrupt request signal
(INTTAAnCC1) is generated. If TOAAn1 pin output is enabled at this time, the output of the TOAAn1 pin is
inverted.
When the TAAnCCR1 register is used as a capture register in the free-running timer mode, the count value of
the 16-bit counter is stored in the TAAnCCR1 register if the valid edge of the capture trigger input pin (TIAAn1
pin) is detected. In the pulse width measurement mode, the count value of the 16-bit counter is stored in the
TAAnCCR1 register and the 16-bit counter is cleared (0000H) if the valid edge of the capture trigger input pin
(TIAAn1) is detected.
Even if the capture operation and reading the TAAnCCR1 register conflict, the correct value of the TAAnCCR1
register can be read.
Operation Mode
Compare register
Compare register
Compare register
Compare register
Compare register
Capture/compare register
Capture register
Capture/Compare Register
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
Anytime write
Anytime write
Batch write
Anytime write
Batch write
Anytime write
How to Write Compare Register
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