UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1105

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(22) UF0 INT clear 1 register (UF0IC1)
UF0IC1
Bit position
This register controls clearing the interrupt sources indicated by the UF0IS1 register.
This register is write-only, in 8-bit units. If this register is read, the value FFH is read.
FW can clear an interrupt source by writing 0 to the corresponding bit of this register. Even a bit that is
automatically cleared to 0 by hardware can be cleared by FW before it is cleared by hardware. Writing 0 to a bit of
this register automatically sets the bit to 1. Writing 1 is invalid.
6
5
4
3
2
1
0
7
1
E0INC
E0INDTC
E0ODTC
SUCESC
STGC
PROTC
CPUDECC
Bit name
E0INC
6
INDTC
E0
This bit clears the EP0IN interrupt.
This bit clears the EP0INDT interrupt.
This bit clears the EP0OUTDT interrupt.
This bit clears the Success interrupt.
This bit clears the Stg interrupt.
This bit clears the Protect interrupt.
This bit clears the CPUDEC interrupt.
5
0: Clear
0: Clear
0: Clear
0: Clear
0: Clear
0: Clear
0: Clear
E0ODTC
4
SUCESC
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
3
STGC
2
Function
PROTC
1
DECC
CPU
0
0020003EH
Address
Page 1105 of 1509
After reset
FFH