UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 528

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(b) Pulse width measurement with capture register
When pulse width measurement is performed with the TT0CCRn register used as a capture register, software
processing is necessary for reading the capture register each time the INTTT0CCn signal has been detected
and for calculating an interval.
When executing pulse width measurement in the free-running timer mode, two pulse widths can be measured
with one channel.
To measure a pulse width, the pulse width can be calculated by reading the value of the TT0CCRn register in
synchronization with the INTTT0CCn signal, and calculating the difference between the read value and the
previously read value.
INTTT0CC0 signal
INTTT0CC1 signal
TT0CCR0 register
TT0CCR1 register
INTTT0OV signal
TIT00 pin input
TIT01 pin input
16-bit counter
TT0OVF bit
TT0CE bit
FFFFH
0000H
0000H
Pulse interval
0000H
Pulse interval
(D
D
00
(D
)
D
00
10
10
)
Pulse interval
(10000H +
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
D
D
01
Cleared to 0 by
CLR instruction
Pulse interval
00
- D
(10000H +
D
D
00
11
)
01
D
− D
D
10
Pulse interval
11
10
(D
)
02
− D
D
D
Pulse interval
02
01
01
(10000H +
D
)
D
12
Cleared to 0 by
CLR instruction
11
− D
Pulse interval
(10000H +
D
D
03
11
12
D
)
− D
D
02
03
02
)
Pulse interval
(10000H +
D
13
Pulse interval
(10000H +
− D
D
D
04
D
12
D
− D
12
Cleared to 0 by
CLR instruction
03
13
)
03
)
D
04
D
D
13
04
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