UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 891

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Notes 1. To cancel the wait state, write FFH to IICn or set WRELn.
Remark
2. Cancel the wait during a slave transmission by writing to IICn, not by setting WRELn.
3. When the wait during a slave transmission is canceled by setting WRELn, TRCn is cleared.
n = 0 to 2
WRELn
INTIICn
WRELn
INTIICn
ACKDn
ACKEn
MSTSn
ACKDn
ACKEn
MSTSn
WTIMn
WTIMn
Processing by master device
SDA0n
Transfer lines
SCL0n
Processing by slave device
SPDn
TRCn
SPDn
TRCn
STDn
SPTn
STDn
SPTn
STTn
STTn
IICn
IICn
(When 8-Clock Wait for Master and 9-Clock Wait for Slave Are Selected) (3/3)
Transmit
H
H
L
L
L
Receive
Figure 19-24. Example of Slave to Master Communication
IICn ← data Note 2
D7
1
D6
2
D5
3
D4
4
(c) Stop condition
D3
5
D2
6
D1
7
D0
8
IICn ← FFH Note 1
NACK
Note 1
9
IICn ← FFH Note 1
Note 1, 3
Note 3
condition
Stop
(when SPIEn = 1)
(When
CHAPTER 19 I
Receive
condition
IICn ← address
SPIEn = 1)
Start
AD6
1
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C BUS