UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 522

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
TT0IOC2
TT0OPT0
(f) TMT0 option register 0 (TT0OPT0)
(g) TMT0 counter read buffer register (TT0CNT)
(h) TMT0 capture/compare registers 0 and 1 (TT0CCR0 and TT0CCR1)
(e) TMT0 I/O control register 2 (TT0IOC2)
The value of the 16-bit counter can be read by reading the TT0CNT register.
These registers function as capture registers or compare registers depending on the setting of the
TT0OPT0.TT0CCSn bit.
When the registers function as capture registers, they store the count value of the 16-bit counter when
the valid edge input to the TIT0n pin is detected.
When the registers function as compare registers and when D
INTTT0CCn signal is generated when the counter reaches (D
TOT00 and TOT01 pins are inverted.
Remark
0
0
n = 0, 1
Figure 9-36. Register Setting in Free-Running Timer Mode (2/2)
0
0
TT0CCS1
0/1
0
TT0CCS0
0/1
0
TT0EES1
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
0/1
0
TT0EES0 TT0ETS1 TT0ETS0
0/1
0
0
0
a
a
is set to the TT0CCRn register, the
+ 1), and the output signals of the
TT0OVF
0/1
0
Select valid edge of
external event count
input (EVTT0 pin)
Overflow flag
Specifies if TT0CCR0
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TT0CCR1
register functions as
capture or compare register
0: Compare register
1: Capture register
Page 522 of 1509

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