UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 331

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
8.3
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
TABn includes the following hardware.
Note TAB1: EVTAB1 pin and TRGAB1 pin
Remarks 1. f
TIABn0
Configuration
f
f
f
f
f
f
f
f
TIABn1
TIABn2
TIABn3
XX
XX
XX
XX
XX
XX
XX
XX
/2
/4
/8
/16
/32
/64
/128
Note
Notes 1. When using the functions of the TIABn0 to TIABn3 and TOABn0 to TOABn3 pins, see Table 4-20
2. n = 0, 1
Registers
Timer inputs
Timer outputs
XX
: Main clock frequency
2. The TIAB00 pin functions alternately as a capture trigger input signal, external event count input
Using Port Pin as Alternate-Function Pin.
signal, and external trigger input signal.
Item
Note 2
Note 2
16-bit counter
TABn capture/compare registers 0 to 3 (TABnCCR0 to TABnCCR3)
TABn counter read buffer register (TABnCNT)
CCR0 to CCR3 buffer registers
TABn control registers 0, 1 (TABnCTL0, TABnCTL1)
TABn I/O control registers 0 to 2 (TABnIOC0 to TABnIOC2, TABnIOC4)
TABn option register 0 (TABnOPT0)
4 (TIABn0
4 (TOABn0 to TOABn3 pins)
register
TABnCCR0
CCR0
buffer
TABnCNT
Figure 8-1. Block Diagram of TABn
Table 8-1. Configuration of TABn
Note 1
to TIABn3 pins)
register
TABnCCR1
CCR1
buffer
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
Internal bus
Internal bus
16-bit counter
register
TABnCCR2
Configuration
CCR2
buffer
register
TABnCCR3
CCR3
buffer
Clear
INTTABnOV
TOABn0
TOABn1
TOABn2
TOABn3
INTTABnCC0
INTTABnCC1
INTTABnCC2
INTTABnCC3
Page 331 of 1509