UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1183

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Notes 1. This register can be cleared to 0 by the RESET signal because its write pointer, counter, and read pointer
2. This register cannot be cleared to 0. Because data can be written to it by FW, however, any value can be
UF0E3IM register
UF0E4IM register
UF0E7IM register
UF0E0R register
UF0E0L register
UF0E0ST register
UF0E0W register
UF0BO1 register
UF0BO1L register
UF0BO2 register
UF0BO2L register
UF0BI1 register
UF0BI2 register
UF0INT1 register
UF0DSTL register
UF0E0SL register
UF0E1SL register
UF0E2SL register
UF0E3SL register
UF0E4SL register
UF0E7SL register
UF0ADRS register
UF0CNF register
UF0IF0 register
UF0IF1 register
UF0IF2 register
UF0IF3 register
UF0IF4 register
UF0DSCL register
UF0DDn register (n = 0 to 17)
UF0CIEn register (n = 0 to 255)
are cleared to 0 when the RESET signal becomes active, in the same manner as clearing by the UF0FICn
register, as the register is controlled by FIFO.
written to the register (before doing so, however, be sure to set the EP0NKA bit of the UF0E0NA register to
1).
Register Name
Table 21-8. Register Values in Specific Status (2/2)
00H
00H
00H
Undefined
00H
Undefined
Undefined
Undefined
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
Note 2
Note 2
00H
Undefined
00H
Undefined
00H
Undefined
00H
After CPU Reset (RESET)
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
Value is held.
Value is held.
Value is held.
Value is held.
Value is held.
00H
Value is held.
Value is held.
Value is held.
Value is held.
Value is held.
Value is held.
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
Value is held.
Note 2
Note 2
Value is held.
Value is held.
After Bus Reset
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