UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1432

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
(T
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Remarks 1. T = 1/f
TI high-level width
TI low-level width
TENCn high-level width
TENCn low-level width
TECR0 high-level width
TECR0 low-level width
TITn high-level width
TITn low-level width
EVTT0 high-level width
EVTT0 low-level width
TENCn input time difference
A
(3) Timer timing
= −40 to +85°C, V
2. T
3. T
4. The specifications above show the pulse widths that can be accurately detected as valid edges. Therefore,
Parameter
TENC00 (input)
TENC01 (input)
f
even if a pulse width less than the above specifications is input, it may be detected as a valid edge.
TECR0 (input)
XX
SMP1
SMP2
/64.
TIn (input)
: Set by the noise elimination control register (TANFC). Selectable from f
: Set by the noise elimination control register (TTNFC). Selectable from f
XX
DD
= EV
DD
= UV
t
t
t
t
t
t
t
t
t
t
t
TIH
TIL
WENCHn
WENCLn
WCRH0
WCRL0
WTITHn
WTITLn
WTITH0
WTITL0
PHUD
Symbol
DD
= AV
TAB00 to TAB03,TAB10 to TAB13,
EVTAB1, TRGAB1
TIAA00, TIAA01, TIAA10, TIAA11,
TIAA20, TIAA21, TIAA30, TIAA31,
TIAA50, TIAA51,
TAB00 to TAB03, TAB10 to TAB13,
EVTAB1, TRGAB1
TIAA00, TIAA01, TIAA10, TIAA11,
TIAA20, TIAA21, TIAA30, TIAA31,
TIAA50, TIAA51,
n = 0, 1
n = 0, 1
n = 0, 1
n = 0, 1
n = 0, 1
<t
<t
REF0
WTIHn
WUDH01
<t
<t
WUDH00
>/<t
WTCH0
= AV
>
WTITHn
>
>
REF1
Conditions
>
, V
SS
= AV
CHAPTER 33 ELECTRICAL SPECIFICATIONS
SS
= 0 V, C
<t
<t
WTILn
WUDL01
<t
<t
WUDL00
12T + 20
3T
12T + 20
3T
3T
3T
3T
3T
3T
3T
3T
3T
3T
>/<t
WTCL0
>
SMP1
SMP1
SMP2
SMP2
SMP2
SMP2
SMP2
SMP2
SMP2
SMP2
SMP2
L
WTITLn
>
>
= 50 pF)
MIN.
+ 20
+ 20
+ 20
+ 20
+ 20
+ 20
+ 20
+ 20
+ 20
+ 20
+ 20
>
XX
XX
<t
PHUD
and f
/4, f
>
MAX.
XX
XX
/8, f
/4.
Page 1432 of 1509
XX
/16, f
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
XX
/32, and