UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1283

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
23.3.5 Interrupt mask registers 0 to 5 (IMR0 to IMR5)
IMR5 registers is equivalent to the xxICn.xxMKn bit.
these registers can be read or written in 8-bit or 1-bit units (m = 0 to 5).
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
The IMR0 to IMR5 registers set the interrupt mask state for the maskable interrupts. The xxMKn bit of the IMR0 to
The IMRm register can be read or written in 16-bit units.
If the higher 8 bits of the IMRm register are used as an IMRmH register and the lower 8 bits as an IMRmL register,
Reset sets these registers to FFFFH.
Caution The device file defines the xxICn.xxMKn bit as a reserved word. If a bit is manipulated using the
Notes 1. To read bits 8 to 15 of the IMR3 to IMR5 registers in 8-bit or 1-bit units, specify them as bits 0 to 7 of
Caution Set bits 9 to 11, 14, 15 of the IMR5 register to 1. If the setting of these bits is changed, the
Remark
2.
IMR5 (IMR5H
IMR4 (IMR4H
IMR3 (IMR3H
name of xxMKn, the contents of the xxICn register, instead of the IMRm register, are rewritten (as a
result, the contents of the IMRm register are also rewritten).
IMR3H to IMR5H registers.
μ
operation is not guaranteed.
xx: Identification name of each peripheral unit (see Table 23-4
n:
PD70F3770, 70F3771 only
(xxICn)).
Peripheral unit number (see Table 23-4 Interrupt Control Register (xxICn))
IMR5L
IMR4L
IMR3L
After reset: FFFFH
After reset: FFFFH
After reset: FFFFH
Note 1
Note 1
Note 1
)
)
)
RECMK0
TM3EQMK0
DMAMK2
UC2TMK
CF3TMK
15
15
15
1
7
7
7
Note 2
WUPMK0
DMAMK1
TM2EQMK0
UC2RMK
CF3RMK
CHAPTER 23 INTERRUPT/EXCEPTION PROCESSING FUNCTION
14
14
14
1
6
6
6
R/W
R/W
R/W
Note 2
ERRMK0
TM1EQMK0
DMAMK0
UC1TMK
CF2TMK
UFMK1
Address: IMR5 FFFFF10AH,
Address: IMR4 FFFFF108H,
Address: IMR3 FFFFF106H,
13
13
13
5
5
5
Note 2
TM0EQMK0
RTC2MK RTC1MK RTC0MK
CF2RMK
UC1RMK/
UFMK0
IICMK2
ADMK
IMR5L FFFFF10AH, IMR5H FFFFF10BH
IMR3L FFFFF106H, IMR3H FFFFF107H
IMR4L FFFFF108H, IMR4H FFFFF109H
12
12
12
4
4
4
TAA5CCMK1
UC4TMK
UC0TMK
CF1TMK
11
11
11
1
3
3
3
TAA5CCMK0
UC4RMK
UC0RMK
CF1RMK
10
10
10
1
2
2
2
Interrupt Control Register
TAA5OVMK
UC3TMK
CF3TMK CF3RMK
CF0TMK
KRMK
1
1
1
1
9
9
9
TRXMK0
TAA4CCMK1
DMAMK3
UC3RMK/
CF0RMK/
IICMK0
IICMK1
8
0
8
0
8
0
Page 1283 of 1509
Note 2
(1/2)

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