UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 737

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(8) UARTCn transmit data register L (UCnTXL), UARTCn transmit data register (UCnTX)
Cautions 1. In the transmission operation enable status (UCnPWR = 1 and UCnTXE = 1), Writing to the
The UCnTXL and UCnTX register is an 8-bit or 9-bit register used to set transmit data.
During LSB-first transmission when the data length has been specified as 7 bits, the transmit data is transferred to
bits 6 to 0 of the UCnRX register. During MSB-first transmission, the receive data is transferred to bits 7 to 1 of the
UCnRX register.
The access unit or reset value differs depending on the character length.
• Character length 7/8-bit (UCnOPT1.UCnEBE = 0)
• Character length 9-bit (UCnOPT1.UCnEBE = 0)
(b) Character length 9-bit (UCnOPT1.UCnEBE = 1)
(a) Character length 7/8-bit (UCnOPT1.UCnEBE = 0)
This register can be read or written in 8-bit units.
Reset sets this register to FFH.
This register can be read or written in 16-bit units.
Reset sets this register to 01FFH.
(n = 0 to 4)
(n = 0 to 4)
2. Data writing for consecutive transmission, after be generated the INTUCnT interrupt.
3. If perform to write the UCnTXL, UCnTXLin the disable transmission operation register, can not
UCnTXL
UCnTX
UCnTXL, UCnTX register, as operate as trigger of transmission star, if writing the value of as
soon as before and save value, before the INTUCnT interrupt is occurred, the same data is
transferred at twice.
If writing the next data before the INTUCnT interrupt is occurred, transmission start
processing and source of conflict writing the UCnTXL, UCnTX register, unexpected
operations may occur.
be used as transmission start trigger. Consequently, even if transmission enable status after
perform to write the UCnTXL, UCnTX register in the disable transmission
status, can not be started transmission.
After reset: FFH
After reset: 01FFH
15
0
7
14
0
13
0
R/W
R/W
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
6
12
0
Address: UC0TXL FFFFFA08H, UC1TXL FFFFFA18H,
Address: UC0TX FFFFFA08H, UC1TX FFFFFA18H,
11
0
5
10
0
UC2TXL FFFFFA28H, UC3TXL FFFFFA38H,
UC4TXL FFFFFA48H
UC2TX FFFFFA28H, UC3TX FFFFFA38H,
UC4TX FFFFFA48H
9
0
4
8
7
3
6
5
2
4
3
1
2
1
0
0
Page 737 of 1509
operation

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