UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 224

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(6) TAAn I/O control register 4 (TAAnIOC4)
The TAAnIOC4 register is an 8-bit register that controls the timer output.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H. This register is not reset by stopping the timer operation (TAAnCTL0.TAAnCE = 0).
Cautions 1. Accessing the TAAnIOC4 register is prohibited in the following statuses. For details, see 3.4.9
(n = 0 to 3, 5)
TAAnIOC4
2. The TAAnIOC4 register can be set only in the interval timer mode and free-running timer mode.
(2) Accessing specific on-chip peripheral I/O registers.
•
•
Be sure to set the TAAnIOC4 register to 00H in all other modes (for details of the mode setting,
see 7.4 (2) TAAn control register 1 (TAAnCTL1)). The TAAnIOC4 register setting is invalid if the
TAAnCCR0 and TAAnCCR1 registers are set to the capture function, even if the free-running
timer mode is set.
After reset: 00H
When the CPU operates with the subclock and the main clock oscillation is stopped
When the CPU operates with the internal oscillation clock
TAAnOS1
TAAnOS0
0
0
1
1
0
0
1
1
7
0
TAAnOR1
TAAnOR0
R/W
0
1
0
1
0
1
0
1
6
0
Address:
No request. Normal toggle operation.
Reset request
Fix to inactive level upon next match between value of 16-bit
counter and value of TAAnCCR1 register.
Set request
Fix to active level upon next match between value of 16-bit
counter and value of TAAnCCR1 register.
Keep request
Keep current output level.
No request. Normal toggle operation.
Reset request
Fix to inactive level upon next match between value of 16-bit
counter and value of TAAnCCR0 register.
Set request
Fix to active level upon next match between value of 16-bit
counter and value of TAAnCCR0 register.
Keep request
Keep current output level.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
5
0
TAA0IOC4 FFFFF63CH, TAA1IOC4 FFFFF64CH,
TAA2IOC4 FFFFF65CH, TAA3IOC4 FFFFF66CH,
TAA5IOC4 FFFFF68CH
4
0
Toggle control of TIAAn1 pin
Toggle control of TIAAn0
TAAnOS1 TAAnOR1 TAAnOS0 TAAnOR0
3
2
1
0
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