UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 381

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(d) Conflict between trigger detection and match with CCR0 buffer register
If the trigger is detected immediately after the INTTABnCC0 signal is generated, the 16-bit counter is cleared to
0000H and continues counting up. Therefore, the active period of the TOABnk pin is extended by time from
generation of the INTTABnCC0 signal to trigger detection.
Note TAB1: TRGAB1 pin
Remark
If the trigger is detected immediately before the INTTABnCC0 signal is generated, the INTTABnCC0 signal is
not generated. The 16-bit counter is cleared to 0000H, the TOABnk pin is asserted, and the counter continues
counting. Consequently, the inactive period of the PWM waveform is shortened.
Note TAB1: TRGAB1 pin
Remark
(TIAB00 pin input)
External trigger input
CCR0 buffer register
INTTABnCC0 signal
(TIAB00 pin input)
k = 1 to 3,
n = 0, 1
k = 1 to 3,
n = 0, 1
External trigger input
CCR0 buffer register
TOABnk pin output
INTTABnCC0 signal
TOABnk pin output
16-bit counter
16-bit counter
Note
Note
FFFF
FFFF
0000
0000
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
D
D
0
D
0
D
− 1
0
− 1
0
D
Shortened
D
0
0
Extended
0000
0000
0001
0000
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