UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1212

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
During bulk transfer (OUT), more data may be transmitted from the host than expected by the system. Endpoint2
and Endpoint4 for bulk transfer (OUT) of the V850ES/JG3-H and V850ES/JH3-H consist of two 64-byte buffers so
that NAK responses are suppressed as much as possible and data can be read from the CPU side even while the
bus side is being accessed as the transfer rate of the USB bus increases. Consequently, if the host sends more
data than expected by the system, up to 128 bytes of extra data may be automatically received in the worst case.
In this case, change the control flow from that of the normal processing of Endpoint2 and Endpoint4 to the flow
illustrated below when the quantity of data expected by the system has decreased to two packets. This flowchart
illustrates how Endpoint2 is controlled. Endpoint4 can also be controlled in the same sequence. To use this
flowchart as the control flow of Endpoint4, therefore, read the bit names of Endpoint2 in the flowchart as those of
Endpoint4.
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
Page 1212 of 1509