UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1033

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Note Check the MUC and DN bits using one read access.
Remarks 1. Check the MBON bit at the start and end of the polling routine to see if the message buffer and
2. If the ROVF bit has been once set (1), the receive history list contradicts. Therefore, scan all the
receive history register can be accessed, because a CAN sleep mode transition request which
has been held pending may be under execution. If the MBON bit is cleared (0), stop the
processing under execution. Re-execute the processing after the MBON bit is set (1) again.
receive message buffers that have completed reception.
END
Yes
Figure 20-51. Reception via Software Polling
Read C0MDATAxm,
C0MDLCm, C0MIDLm,
and C0MIDHm registers.
Read C0RGPT register
Clear CINTS1 bit = 1
Clear ROVF bit = 1
Clear CINTS1 bit.
Read normal data.
CINTS1 bit = 1?
Clear ROVF bit.
Clear DN bit = 1
MUC bit = 0
ROVF bit = 1?
RHPM bit = 1?
Clear DN bit.
Yes
DN bit = 0
START
AND
Yes
Yes
No
Note
No
No
No
Read illegal data.
CHAPTER 20 CAN CONTROLLER
Page 1033 of 1509