UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1406

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
32.3 ROM Security Function
32.3.1 Security ID
to prevent the contents of the flash memory from being read by an unauthorized person during on-chip debugging by the
on-chip debug emulator.
ID authentication.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
The flash memory versions of the V850ES/JG3-H and V850ES/JH3-H perform authentication using a 10-byte ID code
Set the ID code in the 10-byte on-chip flash memory area from 0000070H to 0000079H to allow the debugger perform
If the IDs match, the security is released and reading flash memory and using the on-chip debug emulator are enabled.
• Set the 10-byte ID code to 0000070H to 0000079H.
• Bit 7 of 0000079H is the on-chip debug emulator enable flag.
• When the on-chip debug emulator is started, the debugger requests ID input. When the ID code input on the
• Debugging cannot be performed if the on-chip debug emulator enable flag is 0, even if the ID codes match.
Caution After the flash memory is erased, 1 is written to the entire area.
(0: Disable, 1: Enable)
debugger and the ID code set in 0000070H to 0000079H match, the debugger starts.
0 0 0 0 0 7 9 H
0 0 0 0 0 7 0 H
0 0 0 0 0 0 0 H
Figure 32-5. Security ID Area
Security ID
(10 bytes)
CHAPTER 32 ON-CHIP DEBUG FUNCTION
Page 1406 of 1509

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