UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 580

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) TAB1 dead-time compare register (TAB1DTC)
(2) Dead-time counters 1 to 3
The TAB1DTC register is a 10-bit compare register that specifies the dead-time value.
Rewriting this register is prohibited when the TAB1CTL0.TAB1CE bit = 1.
This register can be read or written in 16-bit units.
Reset sets this register to 0000H.
Caution When generating a dead-time period, set the TAB1DTC register to 1 or higher.
The dead-time counters are 10-bit counters that count dead time.
These counters are cleared or count up at the rising or falling edge of the TOAB1m output signal of TAB1, and are
cleared or stopped when their count value matches the value of the TAB1DTC register. The count clock of these
counters is the same as that set by the TAB1CTL0.TAB1CKS2 to TAB1CTL0.TAB1CKS0 bits of TAB1.
Remarks 1. The operation differs when the TAB1OPT2.TAB1DTM bit = 1. For details, see 11.4.2 (4) Automatic
TAB1DTC
2. m = 1 to 3
Note, when the operation is stopped (TAB1CTL0.TAB1CE bit = 0), a dead-time period is not
generated, so the output levels of the TOAB1T1 to TOAB1T3 and TOAB1B1 to TOAB1B3 pins are
in their default states. Therefore, for the protection of the system, take measures such as making
the TOAB1T1 to TOAB1T3 and TOAB1B1 to TOAB1B3 pins go into a high-impedance state before
stopping operation, or setting the output levels of the pins before switching port modes.
When a dead-time period is not needed, set the TAB1DTC register to 0.
After reset: 0000H
dead-time width narrowing function (TAB1OPT2.TAB1DTM bit = 1).
15
000000
R/W
Address: FFFFF584H
10 9
CHAPTER 11 MOTOR CONTROL FUNCTION
TAB1DTC9 to TAB1DTC0
0
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