UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 305

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
TAAnCTL1
TAAnIOC1
TAAnCTL0
TAAnOPT0
(a) TAAn control register 0 (TAAnCTL0)
(b) TAAn control register 1 (TAAnCTL1)
(c) TAAn I/O control register 1 (TAAnIOC1)
(d) TAAn option register 0 (TAAnOPT0)
(e) TAAn counter read buffer register (TAAnCNT)
(f) TAAn capture/compare registers 0 and 1 (TAAnCCR0 and TAAnCCR1)
The value of the 16-bit counter can be read by reading the TAAnCNT register.
These registers store the count value of the 16-bit counter when the valid edge input to the TIAAnm pin is
detected.
Remarks 1. TAAn I/O control register 0 (TAAnIOC0), and TAAn I/O control register 2 (TAAnIOC2) are not
TAAnCE
0/1
0
0
0
2. m = 0, 1
TAAnEST TAAnEEE
Figure 7-41. Register Setting in Pulse Width Measurement Mode
used in the pulse width measurement mode.
n = 0 to 3, 5
0
0
0
0
TAAnCCS1 TAAnCCS0
0
0
0
0
0
0
0
0
TAAnIS3
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
0/1
0
0
0
TAAnMD2
TAAnCKS2 TAAnCKS1 TAAnCKS0
TAAnIS2 TAAnIS1 TAAnIS0
0/1
0/1
1
0
TAAnMD1 TAAnMD0
0/1
0/1
1
0
TAAnOVF
0/1
0/1
0/1
0
1, 1, 0:
Pulse width measurement
mode
Select valid edge
of TIAAn0 pin input
Select valid edge
of TIAAn1 pin input
Select count clock
0: Stops counting
1: Enables counting
Overflow flag
Page 305 of 1509

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