MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1321

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Figure G-4
G.9.2
A less stringent power-up sequence may be implemented if 2.6-V compliant pins and dual 2.6-V/5-V
compliant pins are NOT connected to the 5-V supply with a pull-up resistor or driven by 5-V logic during
power-up/down.
The option B power-up sequence (excluding V
Thus the V
no adverse affects to the device.
The requirement that V
dual 2.6-V/5-V compliant pins and 2.6-V pins. The diodes are forward biased when V
V
Figure G-5
power-up sequence if a keep-alive supply is required. The keep-alive supply should be powered-up at the
same time or before both the high voltage and low voltage supplies are powered-up.
Freescale Semiconductor
DDH
1. V
V
V
and will start to conduct current.
DDH
DDL
DDH
DDH
illustrates the power-up sequence if no keep-alive supply is required.
illustrates the power-down sequence if a keep-alive supply is required.
Power-Up/Down Option B
> V
supply group can be fully powered-up prior to power-up of the V
DDL
V
V
Figure G-4. Option A Power-Down Sequence With Keep-Alive Supply
DDH
DDH
- 0.5 V (V
DDH
≥ V
cannot lag V
DDL
cannot lag V
0.5-V Max
- 0.5 V (V
MPC561/MPC563 Reference Manual, Rev. 1.2
DDH
DDL
by more than 3.1 V.
DDH
cannot lag V
DDL
cannot lead V
by more than 0.5 V is due to ESD diodes in the pad logic for
DDKA
DDL
) is:
DDL
by more than 0.5 V)
3.1-V Max
by more than 0.5 V.)
Ramp down rates may
differ with load.
66-MHz Electrical Characteristics
V
Figure G-6
DDKA
DDL
supply group, with
DDL
is greater than
illustrates the
G-15