MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 83
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MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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References
The Sematech Official Dictionary and the Reference Guide to Letter Symbols for Semiconductor Devices
by the JEDEC Council/Electronics Industries Association are recommended as references for terminology
and symbology.
Freescale Semiconductor
No-op
SRR0
SRR1
UIMM
Term
IABR
JTAG
RISC
UISA
IEEE
LIFO
MSR
GPR
MSB
OEA
POR
PVR
SPR
XER
FPU
LSU
NaN
TBU
VEA
LSB
TBL
TLB
PLL
TTL
LR
TB
IU
Floating-point unit
General-purpose register
Instruction address breakpoint register
Institute for Electrical and Electronics Engineers
Integer unit
Joint Test Action Group
Last-in-first-out
Link register
Least-significant bit
Load/store unit
Most-significant bit
Machine state register
Not a number
No operation
Operating environment architecture
Phase-locked loop
Power-on reset
Processor version register
Reduced instruction set computing
Special-purpose register
Machine status save/restore register 0
Machine status save/restore register 1
Time base facility
Time base lower register
Time base upper register
Translation lookaside buffer
Transistor-to-transistor logic
Unsigned immediate value
User instruction set architecture
Virtual environment architecture
Register used for indicating conditions such as carries and overflows for integer operations
Table ii. Acronyms and Abbreviated Terms (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
Meaning
lxxxiii
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