MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 632
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MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Queued Serial Multi-Channel Module
15.6
The queued serial peripheral interface (QSPI) is used to communicate with external devices through a
synchronous serial bus. The QSPI is fully compatible with SPI systems found on other Freescale products,
but has enhanced capabilities. The QSPI can perform full duplex three-wire or half duplex two-wire
transfers. Several transfer rates, clocking, and interrupt-driven communication options are available.
Figure 15-10
15-14
Note: See bit descriptions in
SRESET
Bits
Field
Addr
0:7
10
11
12
13
14
15
8
9
Queued Serial Peripheral Interface
MSB
is a block diagram of the QSPI.
0
QDDPCS3
QDDPCS2
QDDPCS1
QDDPCS0
QPDMOSI
QPDMISO
QDDSCK
PQSPAR
Name
1
—
PQSPAR*
2
3
Figure 15-9. PORTQS Data Direction Register (DDRQS)
Table 15-10
4
PORTSQS pin assignment register. See
Register
Reserved
QSPI pin data direction for the pin PCS3
0 Pin direction is input
1 Pin direction is output
QSPI pin data direction for the pin PCS2
0 Pin direction is input
1 Pin direction is output
QSPI pin data direction for the pin PCS1
0 Pin direction is input
1 Pin direction is output
QSPI pin data direction for the pin PCS0
0 Pin direction is input
1 Pin direction is output
QSPI pin data direction for the pin SCK
0 Pin direction is input
1 Pin direction is output
QSPI pin data direction for the pin MOSI
0 Pin direction is input
1 Pin direction is output
QSPI pin data direction for the pin MISO
0 Pin direction is input
1 Pin direction is output
5
MPC561/MPC563 Reference Manual, Rev. 1.2
6
Table 15-11. DDRQS Bit Descriptions
(PQSPAR).”
7
—
8
QDDP
CS3
0000_0000_0000_0000
9
QDDP
0x30 5016
CS2
10
QDDP
Description
CS1
11
Section 15.5.2, “PORTQS Pin Assignment
QDDP
CS0
12
QDDSCK QDDMOSI QDDMISO
13
Freescale Semiconductor
14
LSB
15
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