MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 24

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

17.10.3.10
17.10.4
17.10.5
17.10.6
17.10.6.1
17.10.6.2
17.10.6.3
17.10.6.4
17.10.6.5
17.11
17.11.1
17.11.2
17.11.3
17.11.3.1
17.11.3.2
17.11.4
17.11.5
17.11.6
17.11.7
17.11.8
17.11.8.1
17.11.8.2
17.12
17.12.1
17.12.2
17.12.3
17.12.3.1
17.12.3.2
17.12.3.3
17.12.4
17.12.4.1
17.12.4.2
17.12.4.3
17.12.5
17.12.6
17.12.6.1
17.12.6.2
17.13
17.13.1
17.13.2
17.13.3
Freescale Semiconductor
Paragraph
Number
MIOS14 16-bit Parallel Port I/O Submodule (MPIOSM) .......................................... 17-60
MIOS14 Interrupts ...................................................................................................... 17-63
MIOS14 Function Examples ...................................................................................... 17-70
Modular Input/Output Bus (MIOS14) Interface ..................................................... 17-54
Effect of RESET on MPWMSM ............................................................................ 17-54
MPWMSM Registers .............................................................................................. 17-55
MPIOSM Features .................................................................................................. 17-61
MPIOSM Signal Functions ..................................................................................... 17-61
MPIOSM Description ............................................................................................. 17-61
Modular I/O Bus (MIOB) Interface ........................................................................ 17-62
Effect of RESET on MPIOSM ............................................................................... 17-62
MPIOSM Testing .................................................................................................... 17-62
MPIOSM Registers ................................................................................................. 17-62
MPIOSM Register Organization ............................................................................ 17-62
MIOS14 Interrupt Structure .................................................................................... 17-63
MIOS14 Interrupt Request Submodule (MIRSM) ................................................. 17-64
MIRSM0 Interrupt Registers .................................................................................. 17-65
MIRSM1 Interrupt Registers .................................................................................. 17-67
Interrupt Control Section (ICS) .............................................................................. 17-69
MBISM Interrupt Registers .................................................................................... 17-69
MIOS14 Input Double Edge Pulse Width Measurement ........................................ 17-70
MIOS14 Input Double Edge Period Measurement ................................................. 17-71
MIOS14 Double Edge Single Output Pulse Generation ......................................... 17-72
MPWMSM Data Coherency ............................................................................... 17-54
MPWMSM Registers Organization .................................................................... 17-55
MPWMSM Period Register (MPWMPERR) ..................................................... 17-57
MPWMSM Pulse Width Register (MPWMPULR) ........................................... 17-57
MPWMSM Counter Register (MPWMCNTR) .................................................. 17-58
MPWMSM Status/Control Register (MPWMSCR) ........................................... 17-58
MPIOSM Port Function ...................................................................................... 17-61
Non-Bonded MPIOSM Pads .............................................................................. 17-61
MPIOSM Data Register (MPIOSMDR) ............................................................. 17-62
MPIOSM Data Direction Register (MPIOSMDDR) .......................................... 17-63
Interrupt Status Register (MIOS14SR0) ............................................................. 17-65
Interrupt Enable Register (MIOS14ER0) ........................................................... 17-66
Interrupt Request Pending Register (MIOS14RPR0) ......................................... 17-66
Interrupt Status Register (MIOS14SR1) ............................................................. 17-67
Interrupt Enable Register (MIOS14ER1) ........................................................... 17-68
Interrupt Request Pending Register (MIOS14RPR1) ......................................... 17-68
MIOS14 Interrupt Level Register 0 (MIOS14LVL0) ........................................ 17-69
MIOS14 Interrupt Level Register 1 (MIOS14LVL1) ........................................ 17-70
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Title
Number
Page
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