MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 27

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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20.3.3
20.3.4
20.3.5
20.4
20.4.1
20.4.2
20.4.3
20.4.4
20.4.5
20.4.6
20.5
21.0.1
21.1
21.1.1
21.2
21.2.1
21.2.1.1
21.2.1.2
21.2.1.3
21.2.1.4
21.2.2
21.2.3
21.2.3.1
21.2.4
21.3
21.3.1
21.3.2
21.3.3
21.3.3.1
21.3.4
21.3.5
21.3.6
21.3.6.1
21.3.7
21.3.7.1
21.3.7.2
21.3.7.3
Freescale Semiconductor
Paragraph
Number
DPTRAM Operation ..................................................................................................... 20-6
Multiple Input Signature Calculator (MISC) ................................................................ 20-8
UC3F Interface ............................................................................................................. 21-4
Programming Model ..................................................................................................... 21-5
UC3F Operation .......................................................................................................... 21-19
RAM Base Address Register (RAMBAR) ............................................................... 20-4
MISR High (MISRH) and MISR Low Registers (MISRL) ...................................... 20-5
MISC Counter (MISCNT) ........................................................................................ 20-6
Normal Operation ..................................................................................................... 20-6
Standby Operation .................................................................................................... 20-6
Reset Operation ......................................................................................................... 20-7
Stop Operation .......................................................................................................... 20-7
Freeze Operation ....................................................................................................... 20-7
TPU3 Emulation Mode Operation ............................................................................ 20-7
Features of the CDR3 Flash EEPROM (UC3F) ....................................................... 21-3
External Interface ...................................................................................................... 21-4
UC3F EEPROM Control Registers .......................................................................... 21-5
UC3F EEPROM Array Addressing ........................................................................ 21-15
UC3F EEPROM Shadow Row ............................................................................... 21-15
UC3F EEPROM 512-Kbyte Array Configuration .................................................. 21-19
Reset ........................................................................................................................ 21-19
Register Read and Write Operation ........................................................................ 21-20
Array Read Operation ............................................................................................. 21-20
Shadow Row Select Read Operation ...................................................................... 21-21
Array Program/Erase Interlock Write Operation .................................................... 21-21
High Voltage Operations ........................................................................................ 21-21
Programming .......................................................................................................... 21-21
Register Addressing .............................................................................................. 21-5
UC3F EEPROM Configuration Register (UC3FMCR) ....................................... 21-5
UC3F EEPROM Extended Configuration Register (UC3FMCRE) ..................... 21-8
UC3F EEPROM High Voltage Control Register (UC3FCTL) .......................... 21-11
Reset Configuration Word (UC3FCFIG) ........................................................... 21-16
Array On-Page Read Operation .......................................................................... 21-21
Overview of Program/Erase Operation .............................................................. 21-21
Program Sequence .............................................................................................. 21-22
Program Shadow Information ............................................................................. 21-24
Program Suspend ................................................................................................ 21-25
MPC561/MPC563 Reference Manual, Rev. 1.2
CDR3 Flash (UC3F) EEPROM
Contents
Chapter 21
Title
Number
Page
xxvii

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