MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 805

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

17.13.4 MIOS14 Output Pulse Width Modulation with MDASM
Output waveforms can be generated with any duty cycle without software involvement. The software sets
up a MDASM with the compare times for the rising and falling edges and they are automatically repeated.
The software does not need to respond to interrupts to generate continuous pulses. The frequency may be
selected as the frequency of a free-running counter time-base, times a binary multiplier selected in the
MDASM. Multiple PWM outputs can be created from multiple MDASMs and share one counter
submodule, provided that the frequencies of all of the output signals are a binary multiple of the time-base
and that the counter submodule is operating in a free-running mode. Each MDASM has a software
selectable “don’t care” on high-order bits of the time-base comparison so that the frequency of one output
can be a binary multiple of another signal. Masking the time-base serves to multiply the frequency of the
time-base by a binary number to form the frequency of the output waveform. The duty cycle can vary from
one cycle to 64-Kbyte cycles. The frequency can range from 0.48 Hz to 156 KHz, though the resolution
decreases at the higher frequencies to as low as seven bits. The generation of output square wave signals
is of course the special case where the high and low times are equal.
When an MMCSM is used to drive the time-base, the modulus value is the period of the output PWM
signal.
programmable for a rising or a falling edge. The software selects the period of the output signal by
programming the MMCSM with a modulus value. The leading edge compare value is written into register
A by software and the trailing edge time is written into register B1. When the leading edge value is
reached, the content of register B1 is transferred to register B2, to form the next trailing edge value.
Subsequent changes to the output pulse width are made by writing a new time into register B1. Updates to
the pulse width are always synchronized to the leading edge of the waveform.
Freescale Semiconductor
MIOS14 Modulus Counter Submodule
Figure 17-46
Prescaler
Select
Clock
or Pin
From
shows such an example. The polarity of the leading edge of an output waveform is
Figure 17-45. MIOS14 Example: Double Edge Output Compare
16-bit Up-Counter
MPC561/MPC563 Reference Manual, Rev. 1.2
Submodule Bus
Counter
Buses
16-bit
Two
in OCB mode (MOD3 - MOD0 = 0b0100)
Select
Bus
MIOS14 Double Action Submodule
16-bit Register A
16-bit Register B2
16-bit Compare A
16-bit Compare B
Modular Input/Output Subsystem (MIOS14)
Compare
Interrupt
Flip-Flop
Trailing
Output
Output
Edge
on
Output
Signal
17-73