MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 819

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Freescale Semiconductor
1
(a) If ENRX is disabled, no data will shift into the PPM.
(b) If ENRX is asserted while ENTX=1, the first data bit received will be the data that is transmitted from the PPM, and
2
(a) If ENTX is disabled, no data will shift out of the PPM and the PPM output signals, PPM_TX0 and PPM_TX1 will be
(b) If ENTX is asserted while ENRX = 1, the first data bits transmitted out of the PPM will be the data that was received
Enable RX.
not RX0. See
Enable TX.
high.
into the PPM. See
11:15
Bits
10
Figure
Name
CM
—
Figure
18-10. To receive the first data frame correctly, ENRX and ENTX should be set simultaneously.
Continuous Mode.
0 Non-continuous mode (default). Transmit and/or receive one data frame when STR = 1.
(STR will be automatically cleared by the PPM after the transfer of one data frame.)
1 Data will continuously be transmitted and/or received as long as Transmit and Receive
are enabled.
Refer to
Note: Ensure PPMPCR[STR]=0 when setting PPMPCR[CM]=1
Reserved
18-11. To transmit the first data frame correctly, set ENTX and ENRX simultaneously.
Table 18-3. PPMPCR Bit Descriptions (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 18-5
SAMP[0:2]
100 – 111
Table 18-4. SAMP[0:2] Bit Settings
000
001
010
011
for more information.
Description
Every 16 TCLK
Every 2 TCLK
Every 4 TCLK
Every 8 TCLK
Sample Rate
Every TCLK
Peripheral Pin Multiplexing (PPM) Module
18-13