MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 323

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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8.8
8.8.1
KAPWR and VSS power the following clock unit modules: oscillator, PITRTCLK and TMBCLK
generation logic, timebase, decrementer, RTC, PIT, system clock control register (SCCR), low-power and
reset-control register (PLPRCR), and reset status register (RSR). All other circuits are powered by the
normal supply pins: VDD, QVDDL, NVDDL, VDDF, VDDSYN, VFLASH, VDDH and VSS. The power
supply for each block is listed in
The following are the relations between different power supplies:
Freescale Semiconductor
VDD = QVDDL = NVDDL = VDDSYN = VDDF = 2.6 V ± 0.1 V
KAPWR = VDD ± 0.2 V (during normal operation)
VDDH = VDDA = VFLASH = 5.0 ± 5%
KAPWR = 2.6 ± 0.1 V (during standby operation)
IRAMSTBY = current source > 50 µA, < 1.75 mA (average)
Basic Power Structure
General Power Supply Definitions
The power supply inputs VDD, QVDDL, NVDDL, VDDSYN, and VDDF
should all be connected to the same 2.6-V power supply. The KAPWR
power supply can be connected to a 2.6-V standby power supply. If
KAPWR is not connected to a standby power supply, it should be connected
to the same power supply as VDD. IRAMSTBY is the input to an
approximately 1.7 volt regulator. It must be connected through a resistor to
a standby power supply. The power supply inputs VDDH and VFLASH
should be connected to the same 5.0-V supply. VDDA can be isolated from
VDDH, but should be the same approximate voltage.
1
CLKOUT
SPLL (digital),
System low-power control
Internal logic
Clock drivers
SPLL (analog)
Main oscillator
Reset machine
Limp mode mechanism
Register control
SCCR, PLLRCR and RSR
PPC RTC, PIT, TB, and DEC
CALRAM, DPTRAM, DECRAM
Keep-alive power is supplied by IRAMSTBY, but run
current is provided through VDD
MPC561/MPC563 Reference Manual, Rev. 1.2
Table
8-7.
Table 8-7. Power Supplies
Circuit
NOTE
IRAMSTBY/VDD
NVDDL/QVDDL
Power Supply
VDDSYN
KAPWR
1
Clocks and Power Control
8-21

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