EP1SGX10DF672C5N Altera, EP1SGX10DF672C5N Datasheet - Page 139

• Manufacturer Part Number: EP1SGX10DF672C5N
• Description: IC STRATIX GX FPGA 10KLE 672FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX10DF672C5N

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 362
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Altera Corporation
February 2005
Figure 4–44. EP1SGX40 Device Fast Regional Clock Pin Connections to Fast
Regional Clocks
Combined Resources
Within each region, there are 22 distinct dedicated clocking resources
consisting of 16 global clock lines, 4 regional clock lines, and 2 fast
regional clock lines. Multiplexers are used with these clocks to form 8-bit
busses to drive LAB row clocks, column IOE clocks, or row IOE clocks.
Another multiplexer at the LAB level selects two of the eight row clocks
to feed the LE registers within the LAB. See
fclk[1..0]
Fast Clock
Fast Clock
[3]
[4]
Fast Clock
Fast Clock
Stratix GX Device Handbook, Volume 1
[2]
[5]
Fast Clock
Fast Clock
Figure
[1]
[6]
Stratix GX Architecture
4–45.
Fast Clock
Fast Clock
[0]
[7]
4–73