EP1SGX10DF672C5N Altera, EP1SGX10DF672C5N Datasheet - Page 28

• Manufacturer Part Number: EP1SGX10DF672C5N
• Description: IC STRATIX GX FPGA 10KLE 672FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX10DF672C5N

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 362
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

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Stratix GX Device Handbook, Volume 1
Deserializer (Serial-to-Parallel Converter)
The deserializer converts the serial stream into a parallel 8- or 10-bit data
bus. The deserializer receives the least significant bit first.
a diagram of the deserializer.
Figure 2–14. Deserializer
Word Aligner
The word aligner aligns the incoming data based on the specific byte
boundaries. The word aligner has three customizable modes of operation:
bit-slip mode, 16-bit mode, and 10-bit mode, the last of which is available
for the basic and SONET modes. The word aligner also has two
non-customizable modes of operation, which are the XAUI and GIGE
modes.
Figure 2–15
parallel clock
High-speed
serial clock
Low-speed
shows the word aligner in bit-slip mode.
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
D8
D9
Altera Corporation
Figure 2–14
10
June 2006
is