EP1SGX10DF672C5N Altera, EP1SGX10DF672C5N Datasheet - Page 30

• Manufacturer Part Number: EP1SGX10DF672C5N
• Description: IC STRATIX GX FPGA 10KLE 672FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX10DF672C5N

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 362
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

2–20
Stratix GX Device Handbook, Volume 1
Figure 2–16. Word Aligner in 16-Bit Mode
In the 16-bit mode, the word aligner and pattern detector automatically
aligns and detects a user-defined 16-bit alignment pattern. This pattern
can be in the format of A1A2 or A1A1A2A2 (for the SONET protocol). The
re-alignment of the byte boundary can be done via a user-controlled port.
The 16-bit mode supports only the 8-bit data path in a single-width or
double-width mode.
The 16-bit mode is available only for the Custom mode and SONET
mode. The A1A1A2A2 word alignment pattern option is available only
for the SONET mode and cannot be used in the Custom mode.
Figure 2–17
shows the word aligner in 10-bit mode.
Mode
A1A2
Pattern Detector
16-Bit
Mode
A1A1A2A2
Mode
A1A2
Mode
Word Aligner
Alignment
16-Bit
Mode
Manual
Mode
A1A1A2A2
Mode
Altera Corporation
June 2006