EP1SGX10DF672C5N Altera, EP1SGX10DF672C5N Datasheet - Page 29

• Manufacturer Part Number: EP1SGX10DF672C5N
• Description: IC STRATIX GX FPGA 10KLE 672FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX10DF672C5N

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 362
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Altera Corporation
June 2006
Figure 2–15. Word Aligner in Bit-Slip Mode
In the bit-slip mode, the byte boundary can be modified by a barrel shifter
to slip the byte boundary one bit at a time via a user-controlled bit-slip
port. The bit-slip mode supports both 8-bit and 10-bit data paths
operating in a single or double-width mode.
The pattern detector is active in the bit-slip mode, and it detects the
user-defined pattern that is specified in the MegaWizard
Manager.
The bit-slip mode is available only in Custom mode and SONET mode.
Figure 2–16
10-Bit
Mode
shows the word aligner in 16-bit mode.
Mode
A1A2
Patterm Detector
16-Bit
Mode
A1A1A2A2
Mode
Mode
7-Bit
Stratix GX Device Handbook, Volume 1
Bit-Slip
Mode
Word Aligner
Stratix GX Transceivers
Alignment
Manual
Mode
®
Plug-In
2–19