EP1SGX10DF672C5N Altera, EP1SGX10DF672C5N Datasheet - Page 254

• Manufacturer Part Number: EP1SGX10DF672C5N
• Description: IC STRATIX GX FPGA 10KLE 672FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX10DF672C5N

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 362
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Timing Model
6–52
Stratix GX Device Handbook, Volume 1
Decrease input delay to
internal cells
Decrease input delay to
input register
Decrease input delay to
output register
Increase delay to output
pin
Increase delay to output
enable pin
Increase output clock
enable delay
Increase input clock enable
delay
Increase output enable
clock enable delay
Table 6–79. Stratix GX IOE Programmable Delays on Row Pins
Parameter
Off
On
Small
Medium
Large
Off
On
Off
On
Off
On
Off
On
Off
On
Small
Large
Off
On
Small
Large
Off
On
Small
Large
Setting
-5 Speed Grade
Min
3,970
3,390
2,810
3,900
1,240
1,016
1,016
Max
164
164
377
348
180
260
260
180
260
260
540
0
0
0
0
0
0
0
-6 Speed Grade
Min
4,367
3,729
3,091
4,290
1,364
1,118
1,118
Max
173
173
397
383
198
286
286
198
286
286
594
0
0
0
0
0
0
0
-7 Speed Grade
Min
Altera Corporation
5,022
4,288
3,554
4,933
1,568
1,285
1,285
Max
198
198
456
441
227
328
328
227
328
328
683
0
0
0
0
0
0
0
June 2006
Unit
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