DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 112

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 3 MCU Operating Modes
3.2
The following registers are related to the operating mode setting.
• Mode control register (MDCR)
• System control register (SYSCR)
3.2.1
MDCR indicates the current operating mode. When MDCR is read from, the states of signals
MD2 to MD0 are latched. This latch is canceled by a reset.
Rev.1.00 Sep. 08, 2005 Page 62 of 966
REJ09B0219-0100
Bit
15
14
13
12
11
10
9
8
Note: * Determined by pins MD2 to MD0.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit Name
MDS3
MDS2
MDS1
MDS0
Register Descriptions
Mode Control Register (MDCR)
15
R
R
0
7
0
Initial Value R/W
0
1
0
1
Undefined*
Undefined*
Undefined*
Undefined*
14
R
R
1
6
1
R
R
R
R
R
R
R
R
13
R
R
5
0
0
Descriptions
Reserved
These are read-only bits and cannot be modified.
Mode Select 3 to 0
These bits indicate the operating mode selected by
the mode pins (MD2 to MD0) (see table 3.2).
When MDCR is read, the signal levels input on pins
MD2 to MD0 are latched into these bits. These
latches are released by a reset.
12
R
R
1
4
1
Undefined*
Undefined*
MDS3
11
R
R
3
Undefined*
Undefined*
MDS2
10
R
R
2
Undefined*
Undefined*
MDS1
R
R
9
1
Undefined*
Undefined*
MDS0
R
R
8
0

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