DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 782

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 16 I
16.5
There are six interrupt requests in this module; transmit data empty, transmit end, receive data full,
NACK detection, STOP recognition, and arbitration lost. Table 16.3 shows the contents of each
interrupt request.
Table 16.3 Interrupt Requests
16.6
This module has a possibility that the high-level period is shortened in the two states described
below.
In master mode,
• When SCL is driven low by the slave device
• When the rising speed of SCL is lowered by the load on the SCL line (load capacitance or
Therefore, this module monitors SCL and communicates bit by bit in synchronization.
Figure 16.18 shows the timing of the bit synchronous circuit, and Table 16.4 shows the time when
SCL output changes from low to Hi-Z and the period which SCL is monitored.
Rev.1.00 Sep. 08, 2005 Page 732 of 966
REJ09B0219-0100
Interrupt Request
Transmit Data Empty
Transmit End
Receive Data Full
Stop Recognition
NACK Detection
Arbitration Lost
pull-up resistance)
Interrupt Request
Bit Synchronous Circuit
2
C Bus Interface2 (IIC2)
Abbreviation
TXI
TEI
RXI
STPI
MAKI
Interrupt Condition
(TDRE = 1) ⋅ (TIE = 1)
(TEND = 1) ⋅ (TEIE = 1)
(RDRF = 1) ⋅ (RIE = 1)
(STOP = 1) ⋅ (STIE = 1)
{(NACKF = 1) + (AL = 1)} ⋅ (NAKIE = 1)

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