DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 80

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 CPU
2.5.4
EXR is an 8-bit register that contains the trace bit (T) and three interrupt mask bits (I2 to I0).
Operations can be performed on the EXR bits by the LDC, STC, ANDC, ORC, and XORC
instructions.
For details, see section 4, Exception Handling.
Rev.1.00 Sep. 08, 2005 Page 30 of 966
REJ09B0219-0100
Bit
2
1
0
Bit
7
6 to 3
2
1
0
Bit Name
Z
V
C
Bit Name
T
—
I2
I1
I0
Extended Control Register (EXR)
Initial
Value
Undefined R/W
Undefined R/W
Undefined R/W
Initial
Value
0
All 1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Zero Flag
Set to 1 to indicate zero data, and cleared to 0 to
indicate non-zero data.
Overflow Flag
Set to 1 when an arithmetic overflow occurs, and
cleared to 0 otherwise.
Carry Flag
Set to 1 when a carry occurs, and cleared to 0
otherwise. A carry has the following types:
•
•
•
The carry flag is also used as a bit accumulator by bit
manipulation instructions.
Description
Trace Bit
When this bit is set to 1, a trace exception is generated
each time an instruction is executed. When this bit is
cleared to 0, instructions are executed in sequence.
Reserved
These bits are always read as 1.
Interrupt Mask Bits
These bits designate the interrupt mask level (0 to 7).
Carry from the result of addition
Borrow from the result of subtraction
Carry from the result of shift or rotation