DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 250

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
6.9.5
The bus cycle in the address/data multiplexed I/O interface consists of an address cycle and a data
cycle. The data cycle is based on the basic bus interface timing specified by the ABWCR,
ASTCR, WTCRA, WTCRB, RDNCR, and CSACR.
Figures 6.30 and 6.31 show the basic access timings.
Rev.1.00 Sep. 08, 2005 Page 200 of 966
REJ09B0219-0100
Read
Write
Figure 6.30 8-Bit Access Space Access Timing (ABWHn = 1, ABWLn = 1)
Basic Timing
B
Address bus
CSn
AH
RD
D7 to D0
LLWR
D7 to D0
BS
RD/WR
DACK
Note: n = 3 to 7
T
ma1
Address cycle
Address
Address
T
ma2
T
1
Data cycle
Write data
Read data
T
2