DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 854

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 20 Flash Memory (0.18-µm F-ZTAT Version)
(3)
The procedures for download of the on-chip program, initialization, and erasing are shown in
figure 20.14.
Rev.1.00 Sep. 08, 2005 Page 804 of 966
REJ09B0219-0100
Erasing Procedure in User Program Mode
Set SCO to 1 after initializing
VBR and execute download
JSR FTDAR setting
Select on-chip program
to be downloaded and
destination by FTDAR
Start erasing procedure
specify download
Set FKEY to H'A5
Set the FPEFEQ
Clear FKEY to 0
Initialization
FPFR
DPFR
parameter
program
1
Yes
Yes
Figure 20.14 Erasing Procedure in User Program Mode
0 ?
0?
Initialization error processing
Download error processing
32
No
No
1.
No
JSR FTDAR setting
Disable interrupts and
bus master operation
Set FEBS parameter
Clear FKEY to 0
procedure program
Set FKEY to H'5A
other than CPU
Required block
End erasing
FPFR
completed?
erasing is
Erasing
1
Yes
Yes
1 ?
16
Clear FKEY and erasing
No
error processing
2.
3.
4.
5.
6.