DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 736

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 15 USB Function Module (USB)
(5)
The control-out status stage starts with an IN token from the host. When an IN-token is received at
the start of the status stage, there is not yet any data in the EP0i FIFO, and so an EP0i transfer
request interrupt is generated. The application recognizes from this interrupt that the status stage
has started. Next, in order to transmit 0-byte data to the host, 1 is written to the EP0i packet enable
bit but no data is written to the EP0i FIFO. As a result, the next IN token causes 0-byte data to be
transmitted to the host, and control transfer ends.
After the application has finished all processing relating to the data stage, 1 should be written to
the EP0i packet enable bit.
Rev.1.00 Sep. 08, 2005 Page 686 of 966
REJ09B0219-0100
Status Stage (Control-Out)
0-byte transmission to host
Set EP0i transmission
End of control transfer
(IFR0.EP0i TS = 1)
IN token reception
Figure 15.14 Status Stage (Control-Out) Operation
in EP0i FIFO?
complete flag
Valid data
USB function
Yes
ACK
NACK
No
Interrupt request
Interrupt request
Clear EP0i transmission
Write 1 to EP0i packet
(TRG.EP0i PKTE = 1)
End of control transfer
Clear EP0i transfer
(IFR0.EP0i TR = 0)
(IFR0.EP0i TS = 0)
complete flag
request flag
Application
enable bit