DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 114
DF61654N50FTV
Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.DF61653N50FTV.pdf
(1020 pages)
Specifications of DF61654N50FTV
Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 3 MCU Operating Modes
3.2.2
SYSCR controls MAC saturation operation, selects bus width mode for instruction fetch, sets
external bus mode, enables/disables the on-chip RAM, and selects the DTC address mode.
Rev.1.00 Sep. 08, 2005 Page 64 of 966
REJ09B0219-0100
Bit
15
14
13
12
11
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Note: * The initial value depends on the startup mode.
Bit Name
MACS
FETCHMD 0
System Control Register (SYSCR)
R/W
R/W
15
1
7
0
Initial
Value
1
1
0
1
R/W
R/W
14
1
6
0
R/W
R/W
R/W
R/W
R/W
R/W
MACS
R/W
R/W
13
0
5
0
Descriptions
Reserved
These bits are always read as 1. The write value should
always be 1.
Selects either saturation operation or non-saturation
operation for the MAC instruction.
0: MAC instruction is non-saturation operation
1: MAC instruction is saturation operation
Reserved
This bit is always read as 1. The write value should
always be 1.
Instruction Fetch Mode Select
This LSI can prefetch an instruction in units of 16 bits or
32 bits. Select the bus width for instruction fetch
depending on the used memory for the storage of
programs*
0: 32-bit mode
1: 16-bit mode
MAC Saturation Operation Control
R/W
R/W
12
1
4
0
1
.
FETCHMD
R/W
R/W
11
3
0
0
Undefined*
R/W
10
R
2
0
Undefined*
DTCMD
EXPE
R/W
R/W
9
1
1
RAME
R/W
R/W
8
1
0
1
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