DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 537

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
11.3.5
PMR selects the pulse output mode of the PPG for each group. If inverted output is selected, a
low-level pulse is output when PODRL is 1 and a high-level pulse is output when PODRL is 0. If
non-overlapping operation is selected, PPG updates its output values at compare match A or B of
the TPU that becomes the output trigger. For details, refer to section 11.4.4, Non-Overlapping
Pulse Output.
Bit
7
6
5
4
3
2
1
Bit
Bit Name
Initial Value
R/W
Bit Name
G3INV
G2INV
G1INV
G0INV
G3NOV
G2NOV
G1NOV
PPG Output Mode Register (PMR)
G3INV
R/W
7
1
Initial
Value
1
1
1
1
0
0
0
G2INV
R/W
6
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
G1INV
R/W
5
1
Description
This is read-only bit and cannot be modified.
This is read-only bit and cannot be modified.
Group 1 Inversion
Selects direct output or inverted output for pulse output
group 1.
0: Inverted output
1: Direct output
Group 0 Inversion
Selects direct output or inverted output for pulse output
group 0.
0: Inverted output
1: Direct output
This is read-only bit and cannot be modified.
This is read-only bit and cannot be modified.
Group 1 Non-Overlap
Selects normal or non-overlapping operation for pulse
output group 1.
0: Normal operation (output values updated at compare
1: Non-overlapping operation (output values updated at
match A in the selected TPU channel)
compare match A or B in the selected TPU channel)
G0INV
R/W
4
1
Section 11 Programmable Pulse Generator (PPG)
G3NOV
R/W
3
0
Rev.1.00 Sep. 08, 2005 Page 487 of 966
G2NOV
R/W
2
0
G1NOV
R/W
1
0
REJ09B0219-0100
G0NOV
R/W
0
0

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