DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 512

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
[Legend]
O : Possible
 : Not possible
Note: This table shows the initial state immediately after a reset. The relative channel priority
(1)
An interrupt is requested if the TGIE bit in TIER is set to 1 when the TGF flag in TSR is set to 1
by the occurrence of a TGR input capture/compare match on a channel. The interrupt request is
cleared by clearing the TGF flag to 0. The TPU has 16 compare match interrupts, four each for
channels 0 and 3, and two each for channels 1, 2, 4, and 5; and 14 input capture interrupts, four
each for channels 0 and 3, and two each for channels 1, 4, and 5.
(2)
An interrupt is requested if the TCIEV bit in TIER is set to 1 when the TCFV flag in TSR is set to
1 by the occurrence of a TCNT overflow on a channel. The interrupt request is cleared by clearing
the TCFV flag to 0. The TPU has six overflow interrupts, one for each channel.
(3)
An interrupt is requested if the TCIEU bit in TIER is set to 1 when the TCFU flag in TSR is set to
1 by the occurrence of a TCNT underflow on a channel. The interrupt request is cleared by
clearing the TCFU flag to 0. The TPU has four underflow interrupts, one each for channels 1, 2, 4,
and 5.
Rev.1.00 Sep. 08, 2005 Page 462 of 966
REJ09B0219-0100
Channel
4
5
Input Capture/Compare Match Interrupt
Overflow Interrupt
Underflow Interrupt
levels can be changed by the interrupt controller.
Name
TGI4A
TGI4B
TCI4V
TCI4U
TGI5A
TGI5B
TCI5V
TCI5U
Interrupt Source
TGRA_4 input capture/compare match TGFA_4
TGRB_4 input capture/compare match TGFB_4
TCNT_4 overflow
TCNT_4 underflow
TGRA_5 input capture/compare match TGFA_5
TGRB_5 input capture/compare match TGFB_5
TCNT_5 overflow
TCNT_5 underflow
Interrupt Flag
TCFV_4
TCFU_4
TCFV_5
TCFU_5
DTC
Activation
O
O


O
O


DMAC
Activation
O



O


