DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 593

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI has six independent serial communication interface (SCI) channels. The SCI can handle
both asynchronous and clocked synchronous serial communication. Asynchronous serial data
communication can be carried out with standard asynchronous communication chips such as a
Universal Asynchronous Receiver/Transmitter (UART) or Asynchronous Communication
Interface Adapter (ACIA). A function is also provided for serial communication between
processors (multiprocessor communication function). The SCI also supports the smart card (smart
card) interface supporting ISO/IEC 7816-3 (Identification Card) as an extended asynchronous
communication mode. SCI_5 enables transmitting and receiving IrDA communication waveform
based on the IrDA Specifications version 1.0. This LSI incorporates the on-chip CRC (Cyclic
Redundancy Check) computing unit that realizes high reliability of high-speed data transfer. Since
the CRC computing unit is not connected to SCI, operation is executed by writing data to
registers.
Figure 14.1 shows a block diagram of the SCI_0 to SCI_4. Figure 14.2 shows a block diagram of
the SCI_5 and SCI_6.
14.1
• Choice of asynchronous or clocked synchronous serial communication mode
• Full-duplex communication capability
• On-chip baud rate generator allows any bit rate to be selected
• Choice of LSB-first or MSB-first transfer (except in the case of asynchronous mode 7-bit data)
• Four interrupt sources
• Module stop mode can be set
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously. Double-buffering is used in both the transmitter and the receiver,
enabling continuous transmission and continuous reception of serial data.
The external clock can be selected as a transfer clock source (except for the smart card
interface).
The interrupt sources are transmit-end, transmit-data-empty, receive-data-full, and receive
error. The transmit-data-empty and receive-data-full interrupt sources can activate the DTC or
DMAC.
Features
Section 14 Serial Communication Interface
(SCI, IrDA, CRC)
Section 14 Serial Communication Interface (SCI, IrDA, CRC)
Rev.1.00 Sep. 08, 2005 Page 543 of 966
REJ09B0219-0100